Thin film transistors have always been integrated elements of peripheral drive circuits or switch control elements of flat panel display. In addition, thin film transistors are also widely studied and used in the fields of sensors, memories, processors and the like. The thin film transistors which are widely used in industry at present are mainly traditional silicon-based thin film transistors, such as amorphous silicon thin film transistors and polycrystalline silicon thin film transistors. However, with the continuous development of display technologies, these silicon-based thin film transistors cannot meet increasingly high requirements of people on flat panel display technology. In amorphous silicon thin film transistors, the main disadvantages are low mobility, easily degraded performance, and the like, which greatly restrict their applications in aspects of OLED pixel driving circuit, the integration of LCD and OLED peripheral drive circuit and the like. Polycrystalline silicon thin film transistors have disadvantages of high process temperature, high manufacturing cost and poor device performance uniformity, thus they are not suitable for large-size flat panel display application. Therefore, in order to develop the flat panel display technology, metal oxide thin film transistor is a novel thin film transistor technology which is widely studied in recent years.
Metal oxide thin film transistors have low process temperature, low process cost, high carrier mobility as well as uniform and stable device performance, the metal oxide thin film transistors not only have advantages of both amorphous silicon thin film transistors and polycrystalline silicon thin film transistors, but also have advantages such as high visible light transmittance, which are promising for application in the next generation of large size, high resolution and high frame rate transparent display. The channel layer materials used in metal oxide thin film transistors mainly include zinc oxide (ZnO), indium oxide (In2O3), indium gallium zinc oxide (GIZO), zinc tin oxide (ZTO), indium zinc oxide (IZO), indium zinc tin oxide (TIZO), stannic oxide (SnO2), stannous oxide (SnO), cuprous oxide (Cu2O), etc.
In a bottom-gate thin film transistor fabricating process, a passivation layer is generally an indispensable protection layer isolating the channel from the atmosphere, which is deposited after formation of a channel layer, a source and drain. However, growth conditions of the passivation layer generally affect electrical performances of a device, for example, during a process of growing a SiO2 passivation layer by commonly used Plasma Enhanced Chemical Vapor Deposition (PECVD), the back channels usually suffer from plasma bombardment, the hydrogen ions are introduced, and the like, such that the channel layer becomes electrically conductive, the threshold voltage shifts to the negative direction, device performances are degraded, current leakage increases, etc. These adverse influences make it harsh and difficult to control the growth conditions of the passivation layer. As a result, how to grow a passivation layer becomes a technical difficulty which needs to be broken through in fabrication of thin film transistors. On the other hand, the channel layer is a high resistance layer with low carrier concentration, it is needed to add a process to reduce parasitic resistance of the source and drain portions by additionally adding a low resistance metal layer, the complexity of fabrication process is increased.